1. Field of the Invention
The present invention relates to a synchronous rectification DC-DC (direct current to direct current) converter.
2. Discussion of the Background
Contemporary electronic devices are advanced and perform various sophisticated operations. For example, mobile phones frequently play recorded videos as well as still images.
As a result, the performance of a CPU (central processing unit) used in the devices is also enhanced, and the CPU operates at an increased clock speed.
However, when the clock speed is increased, the power consumed by the CPU increases in proportion to the frequency of the clock, which is a problem in a device with a limited power supply such as a mobile phone or the like. Further, in order to increase the clock speed, a higher supply voltage is required. As a result, electric power consumption is increased.
To solve this problem, there are devices in which, when the device operates normally, the supply voltage is reduced and the device operates at a lower clock speed, thus reducing power consumption. By contrast, when high-speed processing (e.g., video processing) is required, the supply voltage is increased and the device is operated at a higher clock speed. Thus, this known technique can minimize the power consumption increase in the overall device.
Part of the circuit architecture described above relies on power source circuits for mobile electronic devices such as synchronous rectification DC-DC converters, which include an inductor that can be compact. Such DC-DC converters are effective and widely used.
In a discontinuous mode, DC-DC converters with synchronous rectifier are susceptible to the occurrence of a reverse current, meaning that the electrical current flows to a ground terminal from an output terminal connecting to a load circuit through the inductor and a synchronous rectification transistor. When a reverse current occurs, power conversion efficiency of the DC-DC converter in particularly is impaired.
To prevent reverse current, the DC-DC converter is provided with a reverse current prevention circuit that forcibly shuts down the synchronous rectification transistor when a reverse current occurs.
Herein, in a case in which the output voltage of the DC-DC converter changes from a higher voltage to a lower voltage, when the load current is low, it takes a longer time for a capacitor connected to the output terminal to discharge, and consequently, reduction of the output voltage requires a longer time. A similar problem occurs when the power supply is turned off.
By contrast, in a case in which the output voltage changes from a lower voltage to a higher voltage, because a time period during which a switching transistor of DC-DC converter is on is set as long as possible, the possibility of occurrence of overshoot that is when the output voltage exceeds a predetermined value increases. When the overshoot is generated, the DC-DC converter operates similarly to when the output voltage changes from the higher voltage to the lower voltage, and therefore, the overshoot period is increased. Here too, a similar problem occurs when the power supply is turned on.
To solve the above-described problem, several approaches as described below have been disclosed.
In one approach, when the power supply is turned off, a reverse current of the synchronous rectification transistor is permitted until the output voltage is decreased to a predetermined voltage. Then, the electric charge in the output capacitor is discharged rapidly by the reverse current of the synchronous rectification transistor, and the speed with which the voltage at the power off is decreased can be accelerated. When the output voltage has decreased to the predetermined voltage, reverse current prevention processing in which the synchronous rectification transistor is forcibly turned off at the occurrence of a reverse current is reactivated.
Consequently, an inductor current is sent to the input voltage via a dependent diode that is formed on the switching transistor.
Further, when the output voltage changes, the reverse current of the synchronous rectification transistor is allowed as described above. Therefore, when the output voltage is higher than a target voltage and is in the discontinuous mode, a reverse current occurs, and the electric charge in the output capacitor is discharged via the inductor and the synchronous rectification transistor. Consequently, the response speed of the output can be accelerated.
However, in the above-described approach, while the output voltage changes, the period during which the reverse current occurs is not controlled. Namely, the electrical current keeps flowing in reverse until a next sequence starts, that is, the switching transistor is turned on and the synchronous rectification transistor is turned off. Consequently, as the electric load current decreases, the period during which the reverse current occurs lengthens. Additionally, because the reverse current is increased over time, when the electric load current is lower, undershoot of the output voltage may be generated.
Further, after the output voltage changes to the predetermined voltage, the reverse voltage prevention processing in which the synchronous rectification transistor is forcibly turned off when a reverse current occurs is executed again. At that time, the electricity stored in the inductor for supplementing the reverse current is excessive, and as a result, the overshoot occurs.
Moreover, because the above-described approach takes no countermeasures when the power is turned on, the overshooting generated immediately after the power on cannot be prevented.